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Electrically Reconfigurable Dual Metal-Gate Planar Field-Effect Transistor for Dopant-free CMOS

机译：电可重构双金属栅平面场效应用于无掺杂CmOs的晶体管

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摘要

In this paper, we demonstrate by simulation the feasibility ofelectrostatically doped and therefore reconfigurable planarfield-effect-transistor (FET) structure which is based on our alreadyfabricated and published Si-nanowire (SiNW) devices. The technologicalcornerstones for this dual-gated general purpose FET contain Schottky S/Djunctions on a silicon-on-insulator (SOI) substrate. The transistor type, i.e.n-type or p-type FET, is electrically selectable on the fly by applying anappropriate control-gate voltage which significantly increases the versatilityand flexibility in the design of digital integrated circuits.

机译：在本文中，我们通过仿真演示了基于我们已经制造和发布的Si-Nanowire（SiNW）器件的静电掺杂并因此可重构的平面场效应晶体管（FET）结构的可行性。这种双栅极通用FET的技术基石在绝缘体上硅（SOI）衬底上包含肖特基S / D结。通过施加适当的控制栅极电压可以动态地电选择晶体管类型（即n型或p型FET），这显着提高了数字集成电路设计的多功能性和灵活性。

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Krauss, Tillmann; Wessely, Frank; Schwalke, Udo;
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年度 2014
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4. Fabrication and simulation of electrically reconfigurable dual metal-gate planar field-effect transistors for dopant-free CMOS [C] . Tillmann Krauss, Frank Wessely, Udo Schwalke IEEE International Conference on Design Technology of Integrated Systems in Nanoscale Era . 2017

机译：用于无掺杂CMOS的电可重构双金属栅平面场效应晶体管的制作和仿真
5. 'Junction-Level' Heterogeneous Integration of III-V Materials with Si CMOS for Novel Asymmetric Field-Effect Transistors. [D] . Chang, Yoon Jung. 2016

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6. CMOS-Compatible Silicon Nanowire Field-Effect Transistor Biosensor: Technology Development toward Commercialization [O] . Duy Phu Tran, Thuy Thi Thanh Pham, Bernhard Wolfrum, 2018

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7. Charge Trap Transistor (CTT): An Embedded Fully Logic-Compatible Multiple-Time Programmable Non-Volatile Memory Element for High- $k$ -Metal-Gate CMOS Technologies [O] . Faraz Khan, Eduard Cartier, Jason C. S. Woo, 2017

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Electrically Reconfigurable Dual Metal-Gate Planar Field-Effect Transistor for Dopant-free CMOS

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